Field of the Invention
The invention relates to an integrated comparator circuit having a series circuit of first and second MOSFETs connected between a first terminal for an operating voltage and a first input terminal, an inverter stage with third and fourth MOSFETs being connected between the first terminal and a second terminal for the operating voltage, a junction between the first and second MOSFETs being connected to the gate terminal of the fourth MOSFET, the transfer characteristic curve of the second MOSFET being steeper than the transfer characteristic curve of the fourth MOSFET, and the second and fourth MOSFETs each being an enhancement MOSFET.
Such a circuit configuration is the subject of German Patent DE 41 38 860 C1, corresponding to co-pending U.S. Pat. No. 5,434,521, for instance. The comparator circuit described therein has MOSFETs of both channel types, both in the inverter stage and in the series circuit. That requires the use of CMOS technology, which is more complex than NMOS or PMOS technology.